The present invention relates to a semi-conductor circuit arrangement, in particular a semi-conductor circuit arrangement for use in continuous time sigma delta modulator circuits, e.g. for high-speed broadband transceivers.
Sigma delta modulators operating as continuous-time modulators, so-called continuous time sigma delta modulators (CT-SD modulators), have the advantage of lower power consumption than sigma delta modulators operating as discrete-time modulators, making these components particularly suitable for wireless signal transmission devices. Alternatively, there is the advantage of a higher bandwidth for the signal processing with the same power consumption. Use of CT-SD modulators is therefore of particular advantage in high-speed broadband signal transmission, such as in VDSL-AFE transceivers, for example.
In a CT-SD modulator circuit, as shown in FIG. 3, a digital output signal 2 of the circuit is fed back into an analog input signal 1 via an outer loop 100. For this purpose the signal is converted into an analog signal by means of an external digital to analog converter 30A.
In order to stabilise the CT-SD modulator circuit against too great a loop delay, an additional inner loop 200 is added, which feeds back the digital output signal 2 of the CT-SD modulator circuit into an analog adding circuit 20. For this purpose the inner loop comprises an internal digital to analog converter 30b. The adding circuit 20 has the task of adding up output signals of a filter loop with typically several integrators or resonators 80 as well as the fed back signal of the inner loop 200. The added up signal forms the input signal of a quantizing circuit 40 which generates from the output signal of the adding circuit 20 a signal which has been made discrete or quantized and represents the digital output signal in the form of a specific coding. The quantized signal can in this case accept only specific discrete values.
For a CT-SD modulator circuit, a circuit arrangement, comprising an adding circuit for adding a fed back digital signal to one or more analog signals and also a quantizing circuit which makes discrete or quantizes the added up signal, is thus needed in an inner loop. The quantized output signal of the quantizing circuit in turn forms the basis for the fed back digital signal.
FIG. 4 shows schematically a conventional semi-conductor circuit arrangement for adding a fed back digital signal to several analog signals and quantizing the added up signal in a CT-SD modulator circuit. The addition takes place in the intrinsically faster current mode, i.e. analog voltage signals Vin1, Vin2 are converted into analog current signals by a voltage to current conversion circuit 10 and added to an output current signal of a digital to analog converter circuit 30′, to which a digital input signal coded via m individual signals DACin1, . . . , DACinm is supplied. The added up current signal is converted back into voltage signals with the aid of resistors 25 and fed into a sample and hold circuit 50. Quantizing takes place via a quantizing circuit 40′ comprising a number of comparator elements 45′, the number of comparator elements 45′ corresponding to the number of discrete values which the quantized signal can accept.
One of the comparator elements compares its respective input voltage with a respective reference voltage provided by a reference voltage generating circuit 60. For this purpose the comparator element 45′ has two differential voltage inputs, i.e. a total of four signal inputs.
Depending on the comparison of the input voltage with the reference voltage, the output signal of each comparator element 45′ accepts one of two possible voltage values in each case, so the m output signals OUT1, . . . , OUTm of the comparator elements 45′ represent a digital output signal 2 of the quantizing circuit 40′ in the form of a coding. The coding is chosen in this case in such a way that the digital output signal of the quantizing circuit 40′ is suitable for feeding back via the digital to analog converter circuit 30′.
One problem with the above-explained implementation of adding and quantizing is that active components, e.g. in the form of operational amplifiers, are needed both for the sample and hold circuit and for the reference voltage generating circuit. When the semi-conductor circuit arrangement is used in a high-speed broadband signal transmission system they have to meet high demands in respect of their bandwidth and increase the power consumption of the modulator circuit.
One object of the present invention is therefore to provide a semi-conductor circuit arrangement which enables addition of a fed back digital signal to at least one analog signal and subsequent quantizing of the added up signal with low outlay.